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The printed circuit board is one of the cornerstones of modern electronics technology. The sheer amount of devices and necessary interconnects to interlink them required for even relatively simple consumer electronics cannot be realized without modern high-density circuit board technology. Naturally, this increased level of complexity poses unique challenges for failure analysis; finding an open trace, for example, may require hours of painstaking work poring over board layouts, performing countless microsurgeries on the board to finally isolate the failing node. Even then, once the failure has been isolated through extensive printed circuit board testing, an analyst’s tribulations are not finished, as they must then find a way to unearth the buried failure.

Fortunately, many tools have been developed that can greatly aid an analyst’s journey to the center of a PCB. Tools like thermal imaging can greatly simplify the printed circuit board testing process by allowing an analyst to photograph a whole board looking for hot spots caused by leakage, instead of cutting and probing individual nodes on the board. Another useful tool for isolating failures on a printed circuit board is time domain reflectometry, which can be used to pinpoint open-circuit conditions with minimal setup needed.

Once printed circuit board testing and isolation has been finished, the analyst still has a difficult task ahead – the task of revealing the defect to be photographed. Generally, the approach is to mount the board for parallel deprocessing, similar to the way an integrated circuit would be mounted for delayering. This process allows an analyst to slowly remove each layer of the board, following the circuitous route taken by a signal of interest, until the defect is finally uncovered. Alternately, an analyst may choose to cross-section the device, looking for defects that bridge across several layers instead of those isolated to a single plane.

As PCBs become more and more dense (many contemporary consumer devices have boards that pack ten or more conductive layers into a space less than one millimeter thick), the task of printed circuit board testing also increases in complexity. Finding defects in these labyrinths of copper and epoxy requires a careful approach, the proper tools, and the experience that comes with years of exposure to cutting-edge PCB technology.

Derek Snider is a failure analyst at Insight Analytical Labs, where he has worked since 2004. He is currently an undergraduate student at the University of Colorado, Colorado Springs, where he is pursuing a Bachelors of Science degree in Electrical Engineering.