Semiconductor and Electronic Failure Analysis Blog

Colorado Springs’ own Insight Analytical Labs (IAL), a world renown electronics failure analysis lab, is now offering a new material analysis service, FTIR (Fourier Transform InfraRed). This technique is used to determine the chemical composition of organic materials, such as oils, fluxes, (add more).

It is based on the exposure of the sample to the IR spectrum, effectively providing a “fingerprint” (see inset) of the material as the IR light is either absorbed or reflected. This fingerprint can then be run against a database of over 50,000 organic materials, much like facial recognition programs seen on many law enforcement television shows. Samples can be as small as 10x10 square microns (a micron is a millionth of a meter, about a tenth the diameter of a hair).

IAL started in Colorado Springs and just celebrated its 24th year in business. Located in northern Colorado Springs, just off of Interquest Parkway and I-25, IAL offers its extensive list of services to the electronic manufacturing, aerospace, biomedical, military, intellectual property (IP), and original equipment manufacturing market segments. IAL’s clients cover North America, Asia, and Europe.

So you’re having a problem with a printed circuit board assembly (PCBA). You’ve done all you can to narrow down the failure site, but you’re at the limit of the capabilities your equipment has available to you. What do you do now?

"Of all the chip-joints, in all the electronic plants, in all the world,
SAM had to walk into mine…"—Bogart-Droid 3000

Some things are just inevitable; they need to be together if the universe is ever going to make sense. Such is the case with Scanning Acoustic Microscopy, or SAM, and the microchip manufacturing process.

Analogy Time

Consider something like automobile production in the United States. It stands at about 12,000,000 cars per year. If 99.9% came off the assembly line in perfect condition and ready-to-drive that would look pretty good on paper. 

Except, perhaps, for the large parking lot outside the assembly plant that would be required to store the bad cars; with 1/10th of 1% of the production failing, 12,000 bright, shiny, brand new cars would be sitting out in the lot. Better plan on having about 250 parking places ready at all times. At least the mechanics and technicians would have permanent jobs.

Microchips

For the average person looking at a tiny microchip, there's very little to see. It's a mysterious black box with "magic" inside. Show them a whole circuit board and suddenly they imagine an aerial view of a cityscape; a burgeoning metropolis with millions of residents and insane complexity. If you were to take a look inside a microchip, you would also see a city with roads of aluminum and copper busily running atop the surface of the silicon die, layer upon layer of them. They make the worst interstate exchange in LA look like a country road.

“Scanning Electron Microscope (SEM) Inspections” are defined in Mil-Std-883, Method 2018 and forms part of a Wafer Lot Acceptance (WLA) plan. The purpose of this standard is to ensure metallization layers in the integrated circuit (IC) do not suffer from systemic processing problems.

Although WLA is not typically cited for industrial environments, the mission critical components in the military and aerospace marketplaces for Method 2018 are a commonplace as a requirement for integrated circuit wafers and die. 

Have you've ever wondered what it might take to start your own semiconductor Failure Analysis (F/A) lab, whether as an internal lab or as an independent lab? There are many considerations, most importantly, the main purpose or goal of the lab.

For example, the need for Integrated Circuit (IC) cross sectioning has dramatically different requirements than if you needed Focused Ion Beam (FIB) edit capability. Although they seem at the extreme ends of complexity, both have their challenges.

In order to establish the capability to cross section ICs, the equipment needs are often understated. Obviously there are the lapping wheels, which can easily cost as much as $20,000 new, or older used models may be purchased off the internet for at a more modest price (about $6,000). The complexity of the technology is a major factor in this decision. A second wheel should also be seriously considered to better facilitate the lapping process by allowing multiple grit papers/solutions to be available at the same time.

But before one can begin cross sectioning the part, it often must be removed from its package (a depot is a procedure to remove the plastic packaging material, leaving the silicon die unscathed). The most straight-forward method to depot a plastic encapsulated IC is through wet chemical etching, using a small quantity of nitric acid or a mixture of nitric and sulfuric acids. Naturally a chemical hood is required, plus a minimal number of acids and solvents, vented cabinets for the chemicals, glassware, personal protective equipment, and a book of Safety Data Sheets for each of the chemicals.

Local agencies will require inspections of the wet chemical area and a plan to neutralize the acid waste and to dispose of the solvent waste must also be developed.

FIB (Focused Ion Beam) technology has certainly come a long way since its introduction in 1975. I recall very well the first encounter I had with the technology as a young ASIC designer in the late 80s. It seemed the most magical thing I had ever encountered: the ability to rework semiconductor devices, not only by being able to cut metallization lines (to correct shorts, for example, as had been done previously on a mechanical probe station), but also to add new conductive paths. FIB literally provided a designer the ability to add what are essentially blue wires to correct bugs in a design, as could be done with a board level product. FIB truly opened a whole new world.

Understanding why things fail is critical to preventing failure in the future. Whether it is a single catastrophic failure whose root cause needs to be understood to prevent future critical failures or a test run of a prototype that is about to go to production understanding the root causes of failure are essential.

Mechanical failures, in particular, can be complex and difficult to understand. When there is a mechanical failure of a material, several tests and images must be taken in order to understand the cause of the failure. Taking your sample to a lab with electron microscopy services can help you dig down further to find out where your failure might have occurred.

Computers used to take up entire rooms to perform what we would consider today rather rudimentary calculations. As computing power increased, the size of the computers decreased. What was once an easily spotted blown tube transistor became a very difficult to see electron leakage through a PNP junction.

Enter the world of microelectronics. Every mobile electronic device today is powered by microelectronics. They need to be small, fast and reliable. They also need to be durable. When things go wrong with them, we want to know what caused the failure and how it can be fixed to make our electronics as reliable as possible.

The electronic compontent failure analysis process can be long and arduous, involving a wide variety of tools and techniques to uncover the root cause of a malfunction. Ultimately, however, the culminating moment of any investigation is the moment where an analyst can produce a clear, sharp photograph as incontrovertible evidence of the existence of a defect. Indeed, not only in failure analysis, but in any of the sciences, it can be said that "seeing is believing": a detailed picture can remove any shadow of doubt as to the nature of an object. In the case of failure analysis, a good image can help to identify the type of corrective action that must be implemented to resolve a recurring problem. Large defects, like those that result from severe electrical overstress, can often be seen clearly under an optical microscope; however, modern integrated circuits are built with geometries measured in terms of angstroms and nanometers, far below the resolution threshold of optical microscopy. Defects on these devices may be completely invisible under an optical microscope. For uncovering even the smallest defects, IAL offers electron microscopy services, providing a crisp, clear image of any anomaly imaginable.

In their final, packaged form, many of the secrets of integrated circuits are concealed from an analyst looking to uncover a failure. While techniques like x-ray and acoustic microscopy can penetrate the shroud of mold compound and FR4 that enfold the semiconductor die at the heart of a device and reveal some information, they rarely tell the whole story; to truly determine the root cause of failure, an analyst almost always needs to be able to examine the device directly. This examination may take many forms - optical or electron microscopy may reveal a defect site, or elemental analysis tools may identify contaminants causing corrosion or other issues - so the techniques used to expose the semiconductor die must take into account the potential failure mechanisms that are most likely for any given device. IC decapsulation is the process - part art, part science - of breaking in to these devices to discover what defects might lie within.

The humble capacitor is one of the most fundamental components of any electronic assembly. These ubiquitous passive devices come in a variety of different flavors; whether formed using electrolytic fluids, metal foils, the metals and oxides of an integrated circuit, or any of a multitude of other materials, there is hardly a printed circuit assembly in the world without at least one capacitor mounted somewhere on its surface. Capacitors form the backbone of charge pumps, frequency filters, power conditioners, and many other common applications; since these components are so crucial to these operations, a malfunctioning capacitor can often cause complete failure of a system. At first blush, a capacitor would seem to be a fairly straightforward device to perform analysis on (after all, how complex can two electrodes separated by a thin dielectric be?), capacitor failure analysis poses unique challenges that must be met with equally unique approaches.

The modern electronics consumer is a demanding, discerning individual. The demands placed on any product are extensive; end users expect a wide range of functionality, with high reliability, at low cost. A device as ubiquitous as a smartphone is capable of facilitating transcontinental data transfer, displaying cutting edge graphics, and performing feats of mathematical might, all in a package small enough to fit into a pocket - and at a price point low enough not to empty said pocket. Modern electronic systems require hundreds, if not thousands, of components, all working together in concert to provide the functionality consumers have come to rely on; from the sheer computing power of a cutting-edge microprocessor to the simplicity of a passive capacitor, each component is vital to a device’s operation, since extraneous or redundant parts are trimmed during design in order to minimize costs. When one of these components fail - even one as minor as a surface mount resistor - a device can go from a modern marvel of technology to an extremely expensive inert hunk of plastic and metal. Determining why a device failed is often an excellent first step towards improving reliability of future generations of products;  electronic component failure analysis is therefore a key component in the race for continuous improvement of electronic devices.

Today’s cutting edge microelectronics are twisting, labyrinthine networks of nanotechnology, with layers upon layers of intertwined metallic and crystalline structures. Gone are the days when one could put a device under an optical microscope and, over the course of a few hours, sketch out a relatively accurate functional schematic; the process technology used in creating a modern microprocessor or memory device creates features so small that they are physically impossible to resolve with optical microscopy, since the wavelength of visible light is so much larger than the features being imaged. Higher resolution electron microscopes can easily resolve the nanometer-scale features on these devices, but the ultra-high magnifications needed to do so mean that only very small areas of the die can be viewed at a given time, an equally restrictive roadblock to understanding a circuit as a whole. Performing intellectual property analysis on a device in order to protect patents or reverse engineer obsolete parts which are no longer manufactured is, in many cases, an exercise in competing compromises; one can get a highly focused analysis with electron microscopy that is very limited in scope, or a very broad look at a device that may lack the necessary depth for certain investigations. Fortunately, IAL is offering new electron microscopy services that work to bridge the gap between viewing large areas and imaging at high resolution.

                The modern electronics and semiconductor markets are fiercely competitive. Manufacturers are constantly vying for supremacy, attempting to carve out a niche with novel, innovative approaches to fulfill the needs and wants of an increasingly demanding customer base. In such a rapidly changing, fast-paced environment, bringing a new product to market can be challenging, especially without any sort of knowledge of how the competition might measure up. Often, a manufacturer looking to break into the market will employ a third party to perform a technical competitive analysis – an in-depth look at the construction of a product that can provide insight into key details like process node, die size, and functional block size that can be used to perform cost and performance analyses. At first blush, technical competitive analyses appear completely separate from failure analysis services; in reality, the tools and techniques developed for finding defects on cutting-edge products translate seamlessly to the type of teardowns necessary to perform a deep dive into the minutiae of a product’s construction.

While solder, the metallic alloy that is melted and reflowed to create joints between components and printed circuit boards, may not be as exciting and glamorous as the intricate webwork of copper and polysilicon in an integrated circuit, it is still vital to the creation of any electronic device. Without proper solder connections, even the most advanced of integrated circuits is reduced to an ineffectual paperweight, lacking any pathways for power and signals to travel over. Being able to perform a solder quality inspection is, therefore, an integral part of any failure analyst’s repertoire of skills.

Failure analysis of consumer electronics can pose a wide variety of challenges, due to the multitude of different failure mechanisms that might befall a device. Environmental factors, mistreatment, and even the way that the device is packaged can contribute to the untimely demise of a device. While the vast majority of integrated circuits are packaged using a plastic or epoxy based mold compound, some high-reliability devices - especially those used in aerospace applications - are encased in hermetically sealed tombs of ceramic and metal. Performing electronic failure analysis of these hermetic packages poses a new set of challenges, as there are certain failure mechanisms and tests that are applicable only to this type of packaging.

Continued from A Study in Printed Circuit Board Failure Analysis, Part 1

The next step in the failure analysis process, revealing the defect, would almost certainly involve destruction of the board; as a result, a strong hypothesis was necessary before embarking upon any further analysis. In order to determine the best course of action, our analyst reviewed the facts as they stood before proceeding.

Over the course of a failure analyst’s career, they will be exposed to an extensive and varied array of devices. No matter the technology – whether they be nanoscopic silicon sensors with moving parts so small as to defy belief or massive circuit assemblies comprised of thousands of discrete components and integrated circuits – no device is completely immune to failure. Variations in process control, insufficiently robust designs, and extended abuse by an end user can all spell early doom for a device. In our introductory article, we took a high level overview of the failure analysis process, discussing the steps an analyst takes to turn a failing, rejected product into actionable knowledge for process improvement; in this column, we will see how these steps are applied to a specific failure. Naturally, examining a relatively trivial case would not provide the necessary depth of learning, so instead we choose to give an example of a failure many analysts dread: an intermittent failure on a printed circuit assembly.

Continued from Failure Is The First Step on the Road To Success, Part 1

Non-destructive testing overlaps to a certain degree with the next step in the process, wherein an analyst attempts to isolate the failure to as small of an area as possible. This phase of the project may include both destructive and non-destructive aspects as necessary to locate a defect site. Some problems may be fairly simple to isolate, given the correct tools; a low resistance short between nodes of a board may be revealed in a matter of seconds using a thermal imaging camera, and the aforementioned cracked solder joint found during visual inspection can usually be probed for continuity with very little trouble. Other defects may require patience, a steady hand, and a methodical plan of attack; finding a leakage site on a PCB, for example, may require an analyst to cut traces (both on the surface of the PCB and buried within) in order to limit the number of possible locations for a defect.

                It is an inexorable fact of life that all electronic assemblies – from the most complex, densely interconnected systems to the cheapest mass-produced consumer devices – will eventually fail. Such devices may be victims of various forms of abuse at the hands of their end users, subjected to mechanical, environmental, or electrical stresses far beyond what any design engineer would consider reasonable. Some, especially early prototypes, may be inherently flawed and susceptible to malfunction as a result of a simple mistake made during one too many late night, bleary-eyed design review sessions, conducted over energy drinks and cold takeout. Of course, it is also possible for assemblies to simply die of old age; eventually, normal wear and tear will break down even the most robust of electronic devices. In all these cases, the result is the same (at least at a very high level): a device that no longer performs its intended function.