Semiconductor Test - Characterizing Failed ICs
One of the most pivotal points of any IC failure analysis is the process of electrical characterization. In order to correctly understand a failure and choose the proper course of action to find its root cause, it is vital to understand the failure’s electrical signature; for example, analysis of a short circuit will follow a far different path than an FA targeting an open circuit. Since it is is so crucial to properly understand the electrical characteristics of a failure, a good FA lab will have a comprehensive semiconductor test program in place that can handle a wide variety of devices.
The most common of the semiconductor tests used in failure analysis is a simple curve trace - a test that compares a single signal pin to another pin (usually a power or ground pin) and plots a graph showing the current flow through the circuit as a function of voltage. This test is sufficient to identify most common defects that result from electrical overstress or electrostatic discharge, but often falls short for finding more subtle defects; in most cases, curve tracing only tests the ESD protection diodes attached to the pin under test, and cannot effectively address nodes deeper in the circuit.
In order to properly test the inner nodes of a given semiconductor circuit, some variety of functional test is usually necessary. Perhaps the most obvious of these tests is simply to power the device up in its normal operating conditions and monitor the device’s outputs to look for anomalies. The drawback of this test is that many devices require extremely complicated setups for normal operation; it is relatively easy to build a test for an 8-pin operational amplifier, but exponentially more different to put together a functional testbench for a processor with hundreds of pins and multiple operating modes! For these more complicated devices, an analyst will often choose to forgo full functional testing in favor of simpler setups to test input and output leakage. Since these tests generally only require that pins be held in a known state - no clocking or signal toggling is required - they are more straightforward to set up, while often still providing good data about a failing device.
A solid semiconductor testing program is a cornerstone of any failure analysis lab. Electrical characterization of a defect is absolutely necessary for a successful FA; once a defect’s unique fingerprints have been found, a well-informed plan can be formulated for continued analysis, diving into the heart of a circuit in order to find the root cause of the device’s failure.
Derek Snider is a failure analyst at Insight Analytical Labs, where he has worked since 2004. He is currently an undergraduate student at the University of Colorado, Colorado Springs, where he is pursuing a Bachelors of Science degree in Electrical Engineering.