If one were able to take a modern printed circuit board and examine the vast network of metal traces, completely unobscured by dielectric materials, one would find an intricate, three-dimensional lacework of finely interwoven metal threads. Thin filaments of copper, reminiscent of a spider’s web, snake outward from ring-shaped vias, while in other places metallic tributaries flow into the large bus lines which carry rushing rapids of electrons that provide power to the devices on the board. The many layers of the board taken as a whole bring to mind a futuristic highway system, with thousands upon thousands of individual pathways crossing over one another, routing traffic seamlessly from point to point. Unfortunately, this highway system is not always perfect; thin filaments may break, rushing rapids of electrons may overflow, and improperly built pathways eventually fail, turning these intricate patterns into tangled snarls sure to frustrate any user. In these cases, electronic device failure analysis can help to unravel the tangled web that was woven; one of many approaches that may be taken in these scenarios is printed circuit board delayering.

                Modern printed circuit assemblies are vastly complex labyrinths of interconnected devices, comprising many hundreds of components and thousands of individual signals being routed through the networks of metal, silicon, and dielectric material. While the individual integrated circuits on an assembly may steal most of the glory – just look at the buzz surrounding the processors inside the latest and greatest cell phone, video card, or supercomputer – interconnect technology is just as important to the success of a given product. To ensure a robust product, the reliability of the connections between individual components and the PCB that hosts them is paramount; to maximize this reliability, failure analysis of electronic assemblies to investigate solder failures is an excellent springboard to continuous improvement.

Imagine, if you will, a futuristic surgery theater. A surgeon sits before a sprawling bank of monitors showing images of her patient that have been magnified to sizes tens or hundreds of thousands of times larger than they would appear to her naked eye. She rests her fingers delicately on a panel of knobs, sliders, and joysticks, carefully adjusting each input to calibrate her instruments. A few moments of fine tuning and the target of her procedure crystallizes into focus: a microscopic defect that, despite its size, seriously threatens the patient’s life. She quickly drafts a surgical plan on the image; instead of forceps or a scalpel, she brings a tightly focused particle beam to bear, making infinitesimally small, precisely placed incisions isolating the anomalous target from its surroundings. A quick twiddle of the controls and the energy beam becomes a tool for reconstruction instead of excision; the surgeon deftly reroutes the affected parts of the patient’s anatomy to circumvent the faulty material, ensuring a full recovery. What may seem to be a scene ripped from the annals of schlocky science fiction may ring truer than one might expect, given one key disclosure: our patient is not a living being, but is rather an integrated circuit, wrought in silicon and metal. Our surgeon’s tool was a focused ion beam (FIB) system; the procedure she executed was not a heart bypass or tumor biopsy, but an example of FIB isolation and editing, one of many electronics failure analysis services offered by IAL.

The culminating moment of triumph for any failure analysis project is when a defect is captured in all its glory - that instant where the noisy tangle of data and observations are crystallized into a coherent analysis due to the addition of one crowning piece of evidence. While it would seem that the final photograph, showcasing the defect that lies at the root of a failure, would draw a failure analysis project to a close, there is often still work left to do; in many cases, analyzing semiconductor failures requires an even deeper examination of the defect, to determine its most likely origin.

At IAL, we constantly strive to provide our customers with accurate, reliable data. We realize that our contribution to a given project may have far-reaching ramifications that continue long after we've sent our reports and finished our analyses. As the microelectronics failure analysis services we provide can be so vital in our customer's process of continuous improvement, it is important to us that we ensure that our tools are up to the task of ferreting out the root cause of failure in even the most complex of devices. Many who are unfamiliar with FA are unaware of the types of tools that might be in an analyst's repertoire; what follows is a brief overview of an analyst's toolbox, all of which can be applied to increase understanding of a failure.

IAL has always been proud to be a one-stop shop for electron microscopy services, consistently offering the high-quality imaging and analysis that is necessary for the failure analysis and intellectual property industries. As the microelectronics industry has evolved, producing smaller, more complex devices, electron microscopy tools have been forced to evolve as well; in keeping with our commitment to providing the highest quality results for our customers, IAL is pleased to announce that we have taken delivery of our new FEI Versa 3D dual beam tool, combining the increased resolution of a field emission electron microscope with the flexibility and added capability of a focused ion beam (FIB) tool. This new acquisition represents an exciting leap forward for our microscopy lab, allowing us to offer several services that previously were out of our reach.

Modern consumer electronics devices must withstand all manner of harsh environments. They may operate in areas where humidity is extremely high, providing ample amounts of ambient moisture that can be detrimental to the operation of sensitive circuits. Many dirty environments are filled with dust, grime, and a whole laundry list of other contaminants ranging from the innocuous to the truly disgusting that can be pulled in by a device’s cooling fans, introducing myriad organic and inorganic contaminants that may collect on the surface of a device. Still other factors may exist that many designers may never even consider as a possible source for contamination; in one case, IAL opened a device that had been returned from the field, only to find the inside thoroughly coated with the remains of unfortunate insects who had attempted a too-thorough inspection of the system’s fan. All of these things may contribute to the malfunction of an electronic device; however, it is up to the analyst to determine whether these contaminants or other environmental factors are truly at the root cause of the failure, or are merely incidental. Could ionic contamination, introduced from the environment, be causing a short circuit? Are the failing solder joints on a device the result of residual material left behind during board manufacturing? Fortunately, analysts have at their disposal tools which can help to understand the chemistry of failure; Auger spectroscopy is one such tool.

Part of the inherent nature of failure analysis is the fact that no two jobs will ever be quite the same. Failure modes, environmental conditions, device applications – all these parameters shape the circumstances of a given failure analysis project. Managing a failure analysis project therefore requires particular care and attention, to ensure that the proper tools and techniques are chosen for a given job. Charting the course of a failure analysis project requires not only a solid grounding in the tests and equipment used in the lab, but also requires on-the-fly synthesis of disparate data points – not just the incoming data generated by the failure analysts, but also information about how and under what conditions a device was used before its failure.

With the release of smaller, more feature-laden devices every year, it is obvious that the electronics industry is in a constant state of flux and evolution. The increase in complexity of a single integrated circuit over the years is undeniable, whether it is due to paradigm shifts in the methods of construction and operation or simply a result of the inexorable march of Moore’s law, which predicts that the number of transistors on integrated circuits will double roughly every two years. Naturally, this constant change in technology has serious ramifications for failure analysis; a technique that was suitable for older products may not be sufficient for submicron technologies, with their densely-packed features and towering metal stacks. The failure analysis industry has therefore needed to respond quickly to changes in technology and develop new techniques capable of handling even the most complex of devices.

Every morning in the life of a failure analyst holds the potential for a new challenge. A board from a missile guidance system, an integrated circuit from the latest cell phone or video game console, or pieces of a high tech neural implant may be but a few of the many different devices that analysts may find waiting on their desks in the morning (after, of course, a requisite stop at the coffee pot – like many other engineering fields, xanthic alkaloids are one of the cornerstones of a healthy analyst’s diet). Though there is a vast range of device types that may cross an analyst’s desk, there are similarities between every FA project that can be examined; regardless of the unique circumstances of a given device, there are still a handful of standard steps that come together to make up a typical day in the life of a failure analyst.

Every failure analysis project is unique; rarely, if ever, will an analyst come across a defect that is exactly identical to one found on a previous project. The wide range of process types, device applications, and conditions that contribute to a failure will change from device to device; since every defect is shaped by the circumstances surrounding its inevitable end of life, no two failures will be alike. Although the specific circumstances of failure may be one-of-a-kind, most IC defects still fall within one of several different categories. These categories are not just convenient pigeonholes for describing a failure - in many cases, they help to indicate the proper course of analysis for the device.

In many cases, it is necessary to isolate a single defect amidst a vast array of circuitry, singling out a single leaky gate or overdriven transistor from among billions, in order to perform a successful failure analysis. Without some visual way to pluck the single defective device out from the lineup of identical looking circuit elements, an analyst cannot properly target the more destructive steps in the analysis, like cross-section or deprocessing. While some tools, like thermal imaging or other heat-sensitive techniques, can be successful in isolating an area for further investigation, in some cases they aren’t enough; the defect may not be generating enough heat to be detected. In these cases, a different approach, in which one takes the time to understand a device more completely by contrasting some sort of characteristic signature of malfunctioning devices against those that are properly functioning, may be able to isolate the failure. Emission microscopy is one such method of characterizing devices, and offers an excellent picture of many different types of failure upon which to build an analysis.

There are many hurdles that must be overcome when attempting to introduce a new electronic gadget to the market. The trials and tribulations of creating a prototype and developing a unique, compelling solution to a consumer problem are only the first step in a long series of trials; with a working prototype in hand, a manufacturer must perform extensive testing on their new product in order to ensure reliability over its lifespan, a process that often leads to several costly design revisions before the product is even released for general consumption. Even after a reliable product has been produced, the qualification process for the new device is not over; unless the manufacturer is making a type of device that is specifically exempted, the new product must undergo RoHS certification or be barred from sale in the vast majority of markets.

In part one of this series of tips for outsourcing or hiring an electronics failure analysis service, we examined the wide variety of information that should be gathered before sending a failing part out for analysis. The construction of a detailed packet of data, including a problem description, a background or history of the failing device, and any auxiliary documents like layouts or schematics that may be necessary in chasing down the root cause of failure of a device is an involved process - but, once such a dataset has been assembled, the struggles of choosing a lab to entrust it with can begin in earnest. Just as one would not want to drop an expensive supercar off with any random shadetree mechanic, a one-of-a-kind failure should be sent to a lab with the  best (and most relevant) capabilities, experience, and a proven track record, in order to help ensure the best results.

Inevitably, in any product’s life cycle, there will arise an obstacle that may seem insurmountable: products may experience unexpected levels of inexplicable malfunctions after hitting store shelves, low production yields may wipe out any hope of profitability, or any of a number of other issues can rear their heads. When faced with such gremlins, manufacturers often struggle to find the best approach for solving their woes - without being able to pin down the problem, finding a solution is impossible. External failure analysis services can often be invaluable in such situations; however, the task of choosing a lab - and providing them with the information needed to ensure their success - can be difficult as well. Fortunately there are some tips that can help in the process of hiring an electronics failure analysis service, to ensure that the necessary results are obtained.

Electronic component distributors are faced with a myriad variety of risks when dealing with the vast array of devices available on the contemporary market. The looming specter of counterfeit or fraudulent devices, combined with the expected stresses of dealing with run-of-the-mill complaints and RMAs, can be an overwhelming combination of potential problems that must be overcome. In order to surmount these obstacles, diligent distributors must often enlist outside assistance. Fortunately, electronic component failure analysis labs are perfectly poised to help these suppliers struggle through any quality issues they may face.

As previously discussed, a cross section of a printed circuit board can be an excellent way to qualify a new process and determine whether a product is being produced to specification. The data about layer spacing, plating thicknesses, and interconnect quality that can be obtained through a well-targeted cross section is invaluable in determining whether appropriate manufacturing procedures are being followed. The cross-section is not only useful for determining the acceptability of a given product, however; indeed, PCB cross section analysis is often one of the only ways to identify certain types of PCB defects.

Non-destructive testing provides the foundation for any thorough failure analysis project. Without properly gathering initial data about the part - condition of the package and leads, electrical behavior, and so on - an analyst would be hard pressed to identify and track down a defect. Often, the use of acoustic microscopy for electronics component inspection can provide invaluable data about the condition of a part that directly leads to identifying the root cause of failure - for example, delamination of the package over the lead for an open-circuited signal. Looking for delamination is only one of the acoustic microscope's applications, however; properly applied, it can reveal much more.

The final step in the majority of integrated circuit failure analysis projects involves deprocessing the device, removing layers of metal and oxide to expose the defect on the device. Though the techniques of deprocessing are incredibly involved and require extremely high levels of skill, they are still inherently brute-force techniques, involving volatile chemicals and abrasive polishes. In some cases, such an approach may be too aggressive. Fortunately, there are tools in an analyst’s repertoire that can be wielded with scalpel-like precision; using a focused ion beam (or FIB) for failure analysis allows an analyst to forgo lapping or wet etching in favor of drilling directly to the site of a failure.

The culminating point of any semiconductor failure analysis job is the task of deprocessing the integrated circuit: removing the various layers of metal and oxide that make up a device until a defect or damage site is revealed. While, in theory, deprocessing seems straightforward, there are many potential pitfalls and nuances that must be accounted for; as such, companies who can successfully offer deprocessing services on wide ranges of parts are few and far between. Successful results hinge upon correctly identifying a process type and matching it with the proper set of techniques from an analyst’s comprehensive set of tools.